Dr. Vikramkumar Pudi

◘ Digital Design
◘ Cyber Security and Cryptography
◘ Computer Arithmetic
◘ Applications of cryptography for real-time applications
◘ Hardware architectures for image and signal processing
◘ Compressive sensing
◘ Hardware architectures for deep learning
◘ Nanoelectronics
◘ Architectures for in-memory computing
◘ Internet-of-things (IoTs) for real-time applications

◘ Anubhab Baksi, Vikramkumar Pudi, Swagata Mandal, and Anupam Chattopadhyay. "Lightweight ASIC Implementation of AEGIS-128." In 2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), pp. 251-256. IEEE, 2018.
◘ Vikramkumar Pudi, Anupam Chattopadhyay, and Kwok-Yan Lam. "Secure and lightweight compressive sensing using stream cipher." IEEE Transactions on Circuits and Systems II: Express Briefs 65.3 (2018): 371-375.
◘ Vikramkumar Pudi, K. Sridharan, and Fabrizio Lombardi. "Majority logic formulations for parallel adder designs at reduced delay and circuit complexity." IEEE transactions on computers 66.10 (2017): 1824-1830.
◘ Anupam Chattopadhyay, Vikramkumar Pudi, Anubhab Baksi, and Thambipillai Srikanthan. "FPGA based cyber security protocol for automated traffic monitoring systems: proposal and implementation." In VLSI (ISVLSI), 2016 IEEE Computer Society Annual Symposium on, pp. 18-23. IEEE, 2016.
◘ Vikramkumar Pudi, and K. Sridharan. "Low complexity design of ripple carry and Brent–Kung adders in QCA." IEEE Transactions on Nanotechnology 11.1 (2012): 105-119.